1. Field of the Invention
The present application relates generally to a control mechanism within an electronic circuit device, and more particular the present application relates to a control mechanism for modifying the frequency of a digital circuit clock signal in such a way that mitigates noise signals such as power supply noise.
2. Description of the Related Art
It is often desirable to change the frequency of the clock driving a digital circuit in response to software load variations, power and temperature constraints, etc. Typically, this is done by stopping the activity in the processor, changing the clock frequency, and then restarting the activity in the processor. Processor activity is stopped prior to the frequency change because large, sudden changes in that frequency typically cause a very large instantaneous variation in the current consumed by the processor. This large instantaneous current variation in turn typically creates a large perturbation in the power supply of the processor, a perturbation that can be fatal to the operation of the digital circuit.
It would thus be desirable to provide a mechanism for changing the frequency of the clock provided to a large digital circuit (such as a processor) while limiting the maximum amount of current variation (di/dt) associated with the clock frequency change.